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Dr.-Ing. Thomas Pöppelmann


I am a Senior Staff Engineer Security Architecture and Cryptography Research in the platform concept engineering group of the Chip Card & Security division of Infineon Technologies AG in Munich. My main area of work is the development of concepts for secured cryptographic modules, security standardization, and innovation projects. My research interests are physical protection of cryptographic implementations, embedded security, post-quantum cryptography, and practical lattice-based cryptography. In 2015 I obtained my PhD (Dr.-Ing.) on practical lattice-based cryptography under the supervision of Prof. Dr.-Ing. Tim Güneysu at Ruhr-University Bochum. You can reach me by writing an email either to thomas.poeppelmann@infineon.com (my PGP key) or ThomasPoeppelmann@googlemail.com.

News

Research

  • My main research interests are the efficient and secure implementation of cryptographic algorithms on various target devices. This includes standard algorithms (e.g., AES, RSA, ECC) but especially so called post-quantum cryptography that could resist attacks by future quantum computers. My focus in this area is the efficient implementation of ideal lattice-based cryptography on embedded systems (e.g., FPGA, ARM, and ATMega platforms).
  • Infineon can offer internships or supervision of MSc and BSc theses in the field of secure hardware or cryptography. If you are interested in applying please drop me an email.
  • You may visit my Google Scholar, DBLP, or LinkedIn page.

Service

  • Reviewer: IEEE Transactions on Computers (TC), Journal of Cryptographic Engineering, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Designs, Codes and Cryptography, IEEE Transactions on Industrial Electronics, Transactions on Parallel and Distributed Systems
  • Program Committee: International Conference on Post-Quantum Cryptography, 2018 (PQCrypto), Design, Automation & Test in Europ (A5 Secure Systems, Circuits, and Architectures), 2018 (DATE), International Conference on Security, Privacy, and Applied Cryptography Engineering, 2017 (SPACE), Workshop on Malicious Software and Hardware in the Internet of Things, 2017 (MAL-IoT), Workshop on Malicious Software and Hardware in the Internet of Things, 2016 (MAL-IoT), Software performance enhancement for encryption and decryption, and benchmarking 2016 (SPEED-B)
  • Sub-Reviewer: CHES (2012-2017), PQCrypto (2013,2014,2017), DATE (2012-2016), DSD (2013,2014), ASAP (2014,2015), SPACE (2012-2014), PKC (2016), SAC (2013,2016,2017), and some more

Presentations

  • 12.04.2018 First PQC Standardization Conference, Ft. Lauderdale: NewHope
  • 21.02.2018 28. SmartCard Workshop, Darmstadt: Implementierung gitterbasierter Kryptografie auf Mikrocontrolle
  • 07.12.2017 Embedded Software Engineering Kongress'17, Sindelfingen: Post-Quantum-Kryptographie auf Eingebetteten Systemen
  • 29.11.2017 TRUSTECH'17, Cannes: Securing the Quantum Computer World: Post-Quantum Cryptography
  • 21.11.2017 The Digital Society Conference'17, Berlin: What is post-quantum security?
  • 15.11.2017 CARDIS'17, Lugano: Post Quantum Cryptography
  • 23.06.2017 TECH DAYS MUNICH, Munich: Countermeasures in the age of quantum computing
  • 17.05.2017 15. Deutscher IT-Sicherheitskongress, Bonn: Implementation of Ideal Lattice-based Cryptography
  • 15.05.2017 Malicious Software and Hardware in Internet of Things, Siena (Panel): Do we need a holistic approach for the design of secure IoT systems?
  • 24.06.2016 Séminaire de Cryptographie, Université de Rennes (invited talk): Implementing Lattice-Based Cryptography on Embedded Devices
  • 24.06.2016 Séminaire sécurité des systèmes électroniques embarqués, IRISA, Rennes (invited talk): Post-quantum key exchange: A new hope
  • 05.06.2015 Summer school on real-world crypto and privacy, Sibenik: Implementing Lattice-Based Cryptography on Embedded Devices
  • 08.05.2015 ITS Alumni Event, RUB: Introduction to Post-Quantum Cryptography
  • 17.07.2014 HGI-Kolloquium, RUB: Efficient Implementation of Ideal Lattice-Based Cryptography (slides)
  • 01.07.2014 CryptArchi 2014, Annecy, France, Implementation Challenges for Ideal Lattice-Based Cryptography on Reconfigurable Hardware (slides)
  • 06.06.2014 ClSIT Seminar, Monash University, Melbourne (invited talk): Practical Lattice-Based Cryptography
  • 04.06.2014 ISCAS'14: On the Implementation of McEliece with CCA2 Indeterminacy by SHA-3 (talk given as replacement for Santosh Ghosh)
  • 04.06.2014 ISCAS'14: Area Optimization of Lightweight Lattice-Based Encryption on Reconfigurable Hardware
  • 23.01.2014 Aric Seminar, ENS Lyon (invited talk), Practical Lattice-Based Signatures (link)
  • 14.08.2013 SAC'13: Towards Practical Lattice-Based Public-Key Encryption on Reconfigurable Hardware
  • 18.06.2013 CDC Oberseminar, TU Darmstadt (invited talk): Software Speed Records for Lattice-Based Signatures
  • 05.06.2013 PQCrypto'13: Software Speed Records for Lattice-Based Signatures (slides)
  • 25.04.2013 CITS-Oberseminar, RUB: Ideal Lattice Implementation
  • 22.11.2012 CAST-Förderpreis IT-Sicherheit, Darmstadt: Efficient Implementation of a Digital Signature Scheme Based on Low-Density Compact Knapsacks on Reconfigurable Hardware (1. Platz in Kategorie 1: Master- und Diplomarbeiten)
  • 09.10.2012 Latincrypt'12: Towards Efficient Arithmetic for Lattice-Based Cryptography on Reconfigurable Hardware
  • 12.09.2012 CHES'12: Practical Lattice-Based Cryptography: A Signature Scheme for Embedded Systems (slides).
  • 04.06.2012 CDC Oberseminar, TU Darmstadt (invited talk): Implementation of a Practical Lattice-Based Signature Scheme on Reconfigurable Hardware

Publications

Vita

Other

  • Most of the code (usually C and VHDL) from my papers is publicly available. You can find a list of papers and the supplemental material here. If you are interested in a piece of code from my papers and can't find it please drop me an email.

Impressum

  • Angaben gemäß § 5 TMG:

    • Thomas Pöppelmann, Orleansstr. 5a, 81669 Munich

    Kontakt:

    • E-Mail: ThomasPoeppelmann@googlemail.com